Tuesday, 6 December 2011

The large memory cube gamble: IBM and Micron stack their chips

Producers happen to be murmuring about three dimensional memory chips for a long time, but an escalation in recent radio chatter indicates the sun's energy is around the cusp to become commercial. Apple revealed a Hybrid Memory Cube (HMC) at IDF, which promises seven occasions the power efficiency of present day DDR3, and today IBM and Micron have proven their hands too. The happy couple just struck up a partnership to create cubes using layers of DRAM connected by vertical conduits referred to as through-plastic vias (TSVs). These support beams allow a 90 % decrease in a memory chip's physical footprint, a 70 % cut in the appetite for energy, and -- on top of that -- a radical rise in bandwidth: HMC prototypes have previously obtained 128Gb/s, making 6Gb/s SATA III seem like a bottleneck. It certainly seems like a game title-changer, unless of course obviously some rival technology like ferroelectric memory will get there first.

[Thanks, Maximilian]



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